YOGITECH's faultRobust technology is based on a design and validation methodology. It makes use of a library of HW fRIPs (called fault supervisors) that can be passives (detecting) but also actives (correcting errors or failures). These IPs are not intrusive and they don’t require any modification of the logic circuit that they supervise. The library includes fault supervisors for CPU fRCPU, for Busses/Interconnects fRBUS, for Memory sub-systems fRMEM and for Peripherals fRPERI. It will also include a library of SW fRIPs and a tool suite to handle the HW-SW integration flow.

YOGITECH's faultRobust technology offers the advantages of asymmetric solutions (low-cost and diversity) while maintaining the highest diagnostic coverage to permit the implementation of SIL2 and SIL3 systems. When higher availability is required, faultRobust technology can be used in combination with dual or multiprocessor cores.